1. Field of the Invention
This invention generally relates to a semiconductor package and a substrate therefore, and more specifically to a semiconductor package and a substrate therefor which are designed for overcoming or eliminating the signal reflection issues.
2. Description of the Related Art
In today""s rapidly growing world of electronic products, there is a main tendency towards high speed circuits. One of the major issues in developing high speed circuits is how to maintain the signal integrity during the signal transmission through a line so that the correct waveform can be kept when the signal arrives the opposite terminal of the line. Otherwise, a waveform distortion may cause malfunction of the circuit, such as producing wrong output, running abnormally or being unable to work, and it makes the product become unmarketable. There are many sources for noise, and the signal reflection is one of the sources.
When a signal is transmitted through a medium, such as a copper line, a portion of the signal isn""t sent to the opposite end of the medium but is reflected toward the signal source, it is so-called xe2x80x9csignal reflectionxe2x80x9d. The reflected signal tends to interfere constructively or destructively with the original signal at different locations of the signal path thereby altering the waveform of the original signal. This causes a misinterpretation of the signal upon receiving a signal with altered waveform. Furthermore, the higher the signal speed the more critical the signal reflection problem becomes.
There are two major causes for the signal reflectionxe2x80x94one is an impedance mismatch between associated mediums (i.e., interconnecting lines), and the other is a non-linear change of the interconnecting line. Set forth below is one example of the signal reflection resulted from the xe2x80x9cnon-linear changexe2x80x9d observed in a conventional semiconductor chip package. When the signal current transmitted from a chip through a substantially vertical gold wire flows into a horizontal conductive trace on a substrate supporting the chip, the current along the vertical direction can hardly be changed to flow in the horizontal direction immediately thereby creating a discontinuity between the gold wire and the conductive trace such that a signal reflection will occur at the discontinuity. Accordingly, there exists a need in the art for a semiconductor package which overcomes, or at least reduces the signal reflection issues.
It is an object of the present invention to provide a semiconductor package utilizing a substrate which can overcome or reduce the problem of the signal reflection occurring at the contact pad on the substrate for wire bonding due to the non-linear change of the interconnecting line.
To achieve the above listed and other objects, the present invention provides a semiconductor package mainly including a substrate comprising a plurality of conductive traces, a semiconductor chip disposed on the upper surface of the substrate and a plurality of wires electrically connecting the semiconductor chip to the conductive traces of the substrate. The present invention is characterized in that the substrate has at least one cavity formed at the junction between the conductive trace on the substrate and the wire extending from the semiconductor chip. The at least one cavity is provided with at least one buffer pad which connects with the conductive trace on the substrate. The buffer pad has a thickness larger than the thickness of the conductive trace. Accordingly, when the signal current is transmitted from the chip through the wire in a substantially vertical direction to the conductive trace of the substrate, the buffer pad provides enough space for the current to change its flow in a horizontal direction thereby overcoming or at least reducing the problem of the signal reflection.
The cavity of the substrate has a depth between about one-third and about one-fifth of the thickness of the substrate and the buffer pad has a thickness substantially equal to the depth of the cavity. Both the buffer pad and the conductive trace on the substrate are made of substantially the same material (typically selected from materials which conduct electricity well, e.g., copper). Generally speaking, gold wires are chosen as the wires for electrically connecting the semiconductor chip to the conductive trace on the substrate. The buffer pad is further provided with a nickel layer formed thereon and a gold layer on the nickel layer thereby facilitating the bonding between the gold wire and the copper trace. Additionally, the substrate is further provided with a plurality of metal pads on the lower surface thereof, wherein the conductive trace is electrically connected to the metal pad by a plurality of plated via holes and to an outside circuit through a solder ball provided on the metal pad.
The present invention further provides methods of manufacturing a substrate for use in the aforementioned semiconductor package.
One method is conducted by processing a conventional substrate into the substrate suitable for use in the present invention. Steps to accomplish the method are described below. First, a substrate with a plurality of conductive traces and a solder mask is used. Next, at least one cavity is formed in the substrate by mechanical drilling or laser ablation. Then the cavity is filled with conductive material (same as the material of the conductive trace, e.g., copper) through a selectively filling step to form at least one buffer pad adapted for wire bonding to the semiconductor chip. According to one embodiment of the present invention, the selectively filling step is accomplished by the following steps. First, a first shielding layer is formed on the entire upper surface of the substrate with the at least one cavity exposed from the first shielding layer. Next, a layer of conductive material is deposited on the upper surface of the substrate by electroless plating. Then, the first shielding layer is removed from the substrate. A second shielding layer is formed on the conductive trace which is exposed from the solder mask and only the at least one cavity is exposed. Next, the cavity is filled with conductive material by electroplating. Finally, the second shielding layer is removed and the filling step is completed. Alternatively, before the second shielding layer is removed, a nickel layer may be formed on the buffer pad and a gold layer may be formed on the nickel layer.
The present invention provides another method of manufacturing a substrate for use in a semiconductor chip package. The method comprises the following steps. First, at least one cavity is formed in the upper surface of a dielectric layer and a plurality of via holes are formed through the dielectric layer by mechanical drilling or laser ablation. Next, a metal layer is formed over the entire surface of the dielectric layer including the at least one cavity and the surface of the via holes. Then, the metal layer is selectively etched to form a predetermined circuit comprising a plurality of conductive traces on the upper surface of the dielectric layer, wherein at least one conductive trace has one end covering the at least one cavity. Next, the at least one cavity is filled with conductive material (same as the material of the aforementioned metal layer) by a selectively filling step so as to form at least one buffer pad adapted for wire bonding to the semiconductor chip. According to one embodiment of the present invention, the selectively filling step is accomplished by the following steps: A layer of solder mask is formed on the entire upper surface of the dielectric layer and the conductive traces with the at least one cavity exposed from the solder mask. The cavity is filled with conductive material by electroplating. Then, the solder mask on predetermined portions (e.g., fingers or solder pads) of the conductive traces is removed. Thereafter, a nickel layer is formed on both the buffer pad and the predetermined portions of the conductive traces which are exposed from the solder mask. Finally, a gold layer is formed on the nickel layer.